Intel presents new transistor technologies at Architecture Day 2020

Intel presents new transistor technologies at Architecture Day 2020
Intel's Chief Architect Raja Koduri, Intel's Chief Architect, and other Intel associates and architects released details on the progress of the company's defined pillars of technology innovation at the Architecture Day 2020 press event.

Intel unveiled its 10nm SuperFin technology, which represents the largest single intranodal improvement in the company's history and produces a performance increase comparable to that achieved by an entire transition to a new manufacturing process.

The company also presented the details of the Willow Cove microarchitecture and Tiger Lake SoC architecture for mobile PCs, also showing for the first time its Xe graphics architectures that are fully usable in different segments, from home use to high performance computing. up to gaming.

With the disaggregated design approach, together with the advanced packaging technology, the offer of XPU and to software-based strategy, Intel's focus is on developing leading products across its portfolio for customers.

New features include the first Xe-HP chip, multi-tiled, highly scalable, high-performance data center rack architecture, GPU scalability and optimization for AI. It covers a dynamic computing range from one tile up to two and four tiles, functioning as a multi-core GPU.

On the occasion of Architecture Day, Intel did a demo of Xe-HP by transcoding 10 Full streams of high quality 4K video at 60fps on a single tile. Another demo showed Xe-HP's computational scalability across multiple tiles. Intel is now testing Xe-HP with key customers and plans to make Xe-HP available to Intel DevCloud for developers. Xe-HP will be available next year.

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